PART |
Description |
Maker |
89HPES32H8G2 |
Low latency cut-through architecture
|
Integrated Device Techn...
|
89HPES32NT8BG2 |
Low latency cut-through architecture
|
Integrated Device Techn...
|
89HPES16H16 |
Low-latency cut-through switch architecture
|
Integrated Device Techn...
|
LTC2421 LTC2422 LTC2421CMS LTC2422CMS LTC2422IMS L |
1-/2-Channel 20-Bit UPower No Latency ADCs in MSOP-10 2-Ch 8ppm INL, 1.2ppm Noise, No Latency Delta Sigma, MS10 8ppm INL, 1.2ppm Noise, 20-Bit No Latency Delta Sigma, MS10 1-/2-Channel 20-Bit Power No Latency DeltaSigmaADCs in MSOP-10 1-/2-Channel 20-Bit µPower No Latency DeltaSigma ADCs in MSOP-10
|
LINER[Linear Technology]
|
100316QI |
Low Power Quad Differential Line Driver with Cut-Off
|
Fairchild Semiconductor
|
CS4362A |
114 dB, 24-bit, 192 kHz, 6- and 8-Channel D/A Converters with DSD Support & Low-Latency Digital Filtering
|
Cirrus Logic
|
CX-7-SM |
Ultra-Miniature, Low Profile AT-Cut Surface Mount Crystal
|
STATEK CORPORATION
|
ATS-55250R-C1-R0-17 |
High efficiency cross-cut fin design provides low pressure drop characteristics
|
Advanced Thermal Soluti...
|
OD-A8JT17AS OD-A8JT17AL OD-08JT17AL OD-08JT17AS OD |
Precision, Low Power Consumption, Fast Warm-up SC-cut OCXO in 20x20 mm Through Hole Package
|
Nel Frequency Controls,... NEL[Nel Frequency Controls,inc]
|
LTC2415-1 LTC2415 LTC2415IGN LTC2415CGN LTC2415-1C |
24-Bit No Latency ADCs with Differential Input and Differential Reference 24-Bit No Latency Delta Sigma ADC with Differential Input and Differential Reference 24-Bit No Latency Delta Sigma ADC with Differential Input, 50/60Hz Rejection
|
LINER[Linear Technology]
|
CX-7SC-SM1 CX-7SC-SM2 CX-7-SM3 CX-7-SM1 CX-7-SM2 C |
20 MHz to 50 MHz Ultra-Miniature, Low Profile AT-Cut Surface Mount Crystal
|
RSG Electronic Components GmbH
|
CY7C1165V18 CY7C1163V18 CY7C1161V18 CY7C1176V18 CY |
18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 9 QDR SRAM, 0.45 ns, PBGA165 18-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 18兆位的国防评估报告⑩- II SRAM字突发架构(2.5周期读写延迟 18-Mbit QDR??II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency)
|
Cypress Semiconductor Corp. Cypress Semiconductor, Corp.
|